1. Field of the Invention
The invention is in the field of electronics and more specifically in the fields of integrated circuit testing and assembly.
2. Related Art
In order to meet the needs and demands of advanced applications, electronic devices are becoming increasingly complex. This complexity makes it difficult and expensive to design single integrated circuits from scratch for specific applications. One approach to meeting the needs of specific applications, while avoiding the use of complex single integrated circuits, is to assemble a set of discrete components into a single package. These discrete components may be a set of previously designed circuits assembled as a system-on-chip (SoC), for example, a system of discrete circuits on a single semiconductor die, a single system-in-package (SiP), a single system-in-module (SiM), a package-in-package (PoP), or the like.
A disadvantage of generating a single electronic device from a set of discrete components is that the failure rate of the entire device is the product of the failure rate of each of the components. Once discrete components are assembled into a single electronic device, any failure can result in the loss of the entire electronic device. Thus, if a memory component has a five percent failure rate, an electronic device having four of these memory components will have at least an 18 percent failure rate. This aggregated failure rate can be very expensive.
One approach to circuit assembly includes mounting auxiliary circuits, for example, memory, on underlying circuits at the wafer level. A built-in self test (BIST) enables testing of the resulting multi-circuit component at the wafer level. However, BIST is not capable of testing the auxiliary devices independently of the underlying circuits on which they have been mounted. Furthermore, the auxiliary circuits may not be accessible for testing. For example, they may have been mounted with contacts exposed to only underlying circuits.
There are systems for testing and repairing individual device components prior to assembly into a single system. For example, circuits can be tested at the wafer level, before the wafer on which they are produced is cut. They may also be repaired using laser fuses or anti-fuse technology. These repairs involve the use of excess (e.g., redundant) circuits within the same individual device component as replacements for defective circuits.
However, these systems cannot always detect failures related to the assembly process and when failures are detected the entire device must be discarded. There is, therefore, a need for improved systems and methods of placing auxiliary circuits, for example, memory, on underlying circuits, for example, Application Specific Integrated Circuits (ASICs), at the wafer level, testing the resulting multi-circuit components including testing the auxiliary circuits, and/or increasing the yield of the resulting multi-circuit components.